Tektronix DPOFL-SDLA64 Serial Data Link Analysis Software

SDLA Visualizer and DPOJET with simultaneous views of a PCI Express 3.0 acquired signal, signal after compliance channel embedding, CTLE and DFE receiver equalization

Features and benefits

• Complete Measurement Circuit De-embed Environment
  • Remove reflections, cross-coupling, and loss caused by fixtures, cables, probes allowing visibility of the true circuit behavior
• Simulation Circuit Embed Tools
  • Embed user defined channel models to simulate the signal at the end of the link without needing physical channels
• Receiver Equalization Flexibility
  • Open closed eyes caused by channel effects using receiver equalization techniques, such as Continuous Time Linear Equalizer (CTLE), Decision Feedback ( DFE), or Feed Forward (FFE) Equalization
  • Model silicon-specific receiver equalization using IBIS-AMI models to observe on-chip behavior
• View the signal at locations that can not be physically probed
  • Allows measurements on signals that otherwise have reflections due to non-ideal probe points
• Advanced Analysis and Modeling Capabilities
  • Flexible modeling including cascading of 4-port S-parameters (differential and single-ended), 2-port S-parameters, TDT Waveforms, RLC Models, loss-less transmission lines, probes, or FIR filters
  • S-parameter and filter scaling to model loss based on a percentage of the actual model
  • "What-If" analysis to evaluate the optimal transmitter settings using flexible insertion/removal of transmitter equalization parameters
  • Twelve test points allow simulated probing where physical probing is not practical
  • View the common mode, differential, or individual inputs of the signal
  • Simultaneously view and measure time-aligned waveforms at multiple test points using integrated DPOJET Jitter and Eye Analysis (opt. DJA) support for real-time scopes
  • Creation of filters for use with JNB02 on the Tektronix DSA8300 Sampling Oscilloscope
  • Automatic measurement of desired test point with JNB for sampling scopes
  • Comprehensive frequency and time domain plots, enable quick verification of S-parameters and test point transfer functions

Applications

• De-embedding the effects of cables, fixtures, and probes for silicon validation

• Characterization of backplane and embedded system performance using IBIS-AMI CTLE, DFE, or FFE receiver equalization

• Link budgeting and What-if Analysis with emulation of a range of channels

• Evaluate Transmitter Equalization (De-emphasis/Pre-emphasis)

• Reflection removal caused by impedance mismatch for high speed serial buses and DDR

• Characterize the performance for multi-gigabit standards such as SATA, USB 3.0, SAS 12 Gb/s, PCIe Gen 3, OIF CEI, XFP, IEEE 802.3 Ethernet